A mechanism for SIMD execution of SPMD programs

Author

Takahashi, Yoshizo

Author_Institution

Dept. of Inf. Sci. & Intelligent Syst., Tokushima Univ., Japan

fYear

1997

fDate

28 Apr-2 May 1997

Firstpage

529

Lastpage

534

Abstract

Although the SIMD machine is appreciated because of its simple structure leading to the aptness for integration in a VLSI chip, the programming paradigm applicable for this machine is rather poor. If the SPMD program, which is widely used in the MIMD machine, is efficiently executed on the SIMD machine, the versatility of this machine will be very much improved. The key problem of executing a SPMD program on a SIMD machine is the handling of branch instructions and barrier synchronization. To resolve this problem a new branching mechanism which includes the instruction address broadcast, the target address register and the active flag in the processing element, is proposed. The effectiveness of this mechanism is discussed on example programs

Keywords

instruction sets; parallel machines; parallel programming; program control structures; synchronisation; MIMD machine; SIMD machine; SPMD programs; VLSI chip; active flag; barrier synchronization; branch instructions; instruction address broadcast; parallel programming; single instruction multiple data; single program multiple data; target address register; Broadcasting; Information science; Intelligent structures; Intelligent systems; Machine intelligence; Parallel processing; Parallel programming; Process control; Systems engineering and theory; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

High Performance Computing on the Information Superhighway, 1997. HPC Asia '97

Conference_Location

Seoul

Print_ISBN

0-8186-7901-8

Type

conf

DOI

10.1109/HPC.1997.592203

Filename

592203