Title :
Vertical SCR structure for on-chip ESD protection in nanoscale CMOS technology
Author :
Chun-Yu Lin ; Pin-Hsin Chang ; Rong-Kun Chang ; Ming-Dou Ker ; Wen-Tai Wang
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Normal Univ., Taipei, Taiwan
fDate :
June 29 2015-July 2 2015
Abstract :
A vertical silicon-controlled rectifier (SCR) structure utilizing ESD implantation layer was proposed and implemented in nanoscale CMOS technology. Compared with the traditional SCR structure, the proposed structure has lower trigger voltage and high enough ESD protection capability. Therefore, the proposed structure was suitable for ESD protection in nanoscale CMOS process.
Keywords :
CMOS integrated circuits; electrostatic discharge; integrated circuit reliability; nanotechnology; thyristors; ESD implantation layer; nanoscale CMOS technology; on-chip ESD protection; trigger voltage; vertical SCR structure; vertical silicon-controlled rectifier structure; CMOS integrated circuits; CMOS technology; Electrostatic discharges; Logic gates; Nanoscale devices; Thyristors;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the
Conference_Location :
Hsinchu
DOI :
10.1109/IPFA.2015.7224380
