Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

Author

Jung-Ruey Tsai ; Ting-Ting Wen ; Shao-Ming Yang ; Gene Sheu ; Ruey-Dar Chang ; Yi-Jhen Syu ; Chin-Ping Liu ; Hsiu-Fu Chang ; Zhao-Hui Wei

Author_Institution

Dept. of Photonic & Commun. Eng., Asia Univ., Taichung, Taiwan

fYear

2015

fDate

June 29 2015-July 2 2015

Firstpage

318

Lastpage

321

Abstract

This work investigates the degradation of electrical characteristics of amorphous silicon thin-film transistors during the accelerated ESD stress with a 40V high voltage and a high/low current of 2 mA/0.1 μA conditions. Both the leakage current and the threshold voltage shift are severe as the accelerated ESD stress applied at the gate region. The 40V accelerated ESD stress with a high current has more severe impact on the electrical performance of device than that with a low current.

Keywords

amorphous semiconductors; electrostatic discharge; leakage currents; semiconductor device reliability; thin film transistors; accelerated ESD stress; amorphous silicon thin-film transistors; current 0.1 muA; current 2 mA; electrical characteristics degradation; electrical performance; gate region; leakage current; reliability analysis; threshold voltage shift; voltage 40 V; Acceleration; Electrostatic discharges; Logic gates; Stress; Temperature; Thin film transistors; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the

Conference_Location

Hsinchu

Type

conf

DOI

10.1109/IPFA.2015.7224388

Filename

7224388