Study on salicide partial missing induce advanced SRAM device soft failure

In our case, the chips passed the Memory of Built-in Self Test (MBIST) test under low voltage, but failed the MBIST test under higher voltage. Shmoo plots illustrate the MBIST failure is soft failure and claim the narrower window than the passed chips at high voltage side. Nanoprobing exhibits NMOS contact (CT) high resistance. Physical Failure Analysis (PFA) shows partial missing of salicide happens underneath of NMOS CT. Simulation results indicate that higher voltage or CT resistor causes lower noise margin for SRAM operation. Additional high voltage of MBIST test is proved as the optimal method to screen weak IC suffering partial salicide missing.