DocumentCode :
1868994
Title :
Gate oxide reliability improvement for UMOS technology
Author :
Gang Niu ; Chien, Wei-ting Kary ; Guan Zhang ; Jianshu Yu ; Xiaodong Zhao ; Xiaobo Duan
Author_Institution :
Reliability Lab., Semicond. Manuf. Int. (Tianjin) Co., Ltd., China
fYear :
2015
fDate :
June 29 2015-July 2 2015
Firstpage :
342
Lastpage :
345
Abstract :
The trench performance of UMOS is very important because it directly affects chip performance. This paper reveals that, during the HTGB test, the trench MOS gate device is seriously degraded due to poor trench uniformity and sidewall profile. In addition, for ultra thick gate oxide (about 500A), the GOI Vramp criteria should be revised.
Keywords :
MOS integrated circuits; integrated circuit reliability; isolation technology; HTGB test; MOS gate device; UMOS technology; chip performance; gate oxide reliability; high temperature gate bias; sidewall profile; trench MOS; trench uniformity; ultra thick gate oxide; Electronic mail; Logic gates; Manufacturing; Oxidation; Reliability; Stress; Temperature; GOI Vramp; HTGB; Soft Dry Etch; Thick Oxide; Trench Gate Oxide; UMOS;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2015 IEEE 22nd International Symposium on the
Conference_Location :
Hsinchu
Type :
conf
DOI :
10.1109/IPFA.2015.7224402
Filename :
7224402
Link To Document :
بازگشت