Title :
Bitline/plateline reference-level-precharge scheme for high-density chainFeRAM
Author :
Oikawa, K. ; Takashima, D. ; Shiratake, S. ; Hoya, K. ; Joachim, H.O.
Author_Institution :
Semicond. Co., Toshiba Corp., Yokohama, Japan
Abstract :
This paper proposes the new bitline/plateline operation scheme for 32 Mb chainFeRAM, which overcomes these two problems and also overcomes the problem of large array current due to the grounded bitline precharge scheme used for FeRAM.
Keywords :
DRAM chips; ferroelectric storage; array current; bitline operation scheme; high density chainFeRAM; plateline operation scheme; Capacitors; Ferroelectric films; Ferroelectric materials; Nonvolatile memory; Parasitic capacitance; Polarization; Power dissipation; Random access memory; Variable structure systems; Voltage;
Conference_Titel :
VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-034-8
DOI :
10.1109/VLSIC.2003.1221191
