Title :
An adaptive reference generation scheme for 1T1C FeRAMs
Author :
Chandler, T. ; Sheikholeslami, A. ; Masui, S. ; Oura, M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Abstract :
A reference time, instead of a reference voltage, is generated used to compare stored "0" and "1" in a race of bitlines towards reaching a threshold voltage in a 1T1C FeRAM. The reference time is adaptive, tracking process variations, aging, and fatigue of ferroelectric capacitors. This scheme is implemented in a 256/spl times/128-bit testchip in a 0.35 /spl mu/m ferroelectric process and achieves a 40 ns access time at 3 V.
Keywords :
ageing; dielectric hysteresis; ferroelectric capacitors; ferroelectric storage; random-access storage; reference circuits; 0.35 micron; 1T-1C ferroelectric random access memory; 3 V; 40 ns; FeRAM; aging; bit testchip; fatigue; ferroelectric capacitors; reference time; reference voltage; threshold voltage; tracking process; Aging; Capacitors; Delay; Fatigue; Ferroelectric films; Ferroelectric materials; Latches; Nonvolatile memory; Random access memory; Threshold voltage;
Conference_Titel :
VLSI Circuits, 2003. Digest of Technical Papers. 2003 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-034-8
DOI :
10.1109/VLSIC.2003.1221193
