• DocumentCode
    1870703
  • Title

    A new four-level PWM inverter topology for high power applications - effect of switching strategies on power losses distribution

  • Author

    Perantzakis, G.S. ; Xepapas, F.H. ; Manias, S.N.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Nat. Tech. Univ. of Athens, Greece
  • Volume
    6
  • fYear
    2004
  • fDate
    20-25 June 2004
  • Firstpage
    4398
  • Abstract
    In this paper a novel four-level pulse width modulation (PWM) hybrid inverter topology is proposed which is composed of a conventional two-level and a three-level neutral point clamped (NPC) inverter suitable for high-voltage power applications. The proposed topology when it is compared to the conventional four-level NPC PWM inverter exhibits the following advantages: (a) ability of changing the losses distribution profile among the devices by selecting the suitable switching strategy, (b) reduction of total inverter power semiconductor device losses, (c) ability of bidirectional operation of all switches, (d) series connected clamping diodes are not needed and (e) flexibility of using existing power semiconductor modules that makes simple the implementation of the proposed power topology. Moreover, the effect of different switching strategies on the conduction and switching losses profile of the proposed inverter is examined by varying the index modulation depth and the load power factor. A suitable losses calculation method for hybrid multilevel inverter is used and a comparison of losses distribution profiles between the proposed inverter and the conventional four-level inverter is carried out. Finally, the theoretical results are confirmed by simulation and experimental results.
  • Keywords
    PWM invertors; network topology; power semiconductor devices; switching convertors; four-level PWM inverter topology; high-voltage power applications; hybrid multilevel inverter; inverter power semiconductor device losses; load power factor; loss distribution profiles; losses calculation method; neutral point clamped inverter; power semiconductor modules; pulse width modulation; switching strategies; Amplitude modulation; Clamps; Frequency; Insulated gate bipolar transistors; Phase modulation; Power semiconductor switches; Pulse width modulation inverters; Semiconductor diodes; Topology; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual
  • ISSN
    0275-9306
  • Print_ISBN
    0-7803-8399-0
  • Type

    conf

  • DOI
    10.1109/PESC.2004.1354778
  • Filename
    1354778