Incorporating IDDQ testing in BIST: improved coverage through test diversity

A scheme for improving test coverage of traditional built-in self-test (BIST) methods through test diversity by combining IDDQ testing with BIST is described in this paper. To support the test diversity approach, the authors present a new differential architecture for built-in current sensing (BICS) which mitigates some of the performance limitations of previous designs and allows at-speed testing for practically-sized circuit partitions. A test circuit incorporating the IDDQ testing elements of the new BIST architecture has been fabricated through MOSIS, using 2.0-micron n-well technology. Results of tests performed on the actual circuit show that it accurately detects all of the test faults implanted in the circuit at speeds of up to 31.25 MHz. The test design establishes the feasibility of incorporating IDDQ testing in a realistic at-speed BIST environment