Title :
Architecture of test support ICs for mixed-signal testing
Author :
Matos, José S. ; Ferreira, J.C. ; Leão, Ana C. ; Silva, José M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Porto Univ., Portugal
Abstract :
Discusses the need of a test infrastructure to support the testing of mixed-signal electronic systems, and discusses a general architecture for test support ICs that can be used to build it. An implementation of a subset of this architecture is described together with its application in a practical example
Keywords :
design for testability; integrated circuit testing; life testing; mixed analogue-digital integrated circuits; general architecture; mixed-signal electronic systems; mixed-signal testing; test infrastructure; test support ICs; Binary search trees; Circuit testing; Consumer electronics; Costs; Digital control; Electronic equipment testing; Integrated circuit testing; Life testing; Monitoring; System testing;
Conference_Titel :
VLSI Test Symposium, 1994. Proceedings., 12th IEEE
Conference_Location :
Cherry Hill, NJ
Print_ISBN :
0-8186-5440-6
DOI :
10.1109/VTEST.1994.292306
