Harmonic compensation using the sliding DFT algorithm

Author

Sozanski, Krzysztof Piotr

Author_Institution

Inst. of Electr. Eng., Zielona Gora Univ., Poland

Volume

6

fYear

2004

fDate

20-25 June 2004

Firstpage

4649

Abstract

This paper describes the sliding discrete Fourier transform (DFT) algorithm as an alternative for typical DFT used for spectrum analysis and synthesis. As an example were used two control circuits for single-phase 3.5 kVA parallel active power filter (APF). The Filters have been built and tested. Some illustrative, experimental results have also been presented in the paper. The control algorithms of the proposed APF are implemented in the floating-point digital signal processor ADSP-21065L and FPGA circuit.

Keywords

active filters; digital control; digital signal processing chips; discrete Fourier transforms; field programmable gate arrays; power engineering computing; power harmonic filters; 3.5 kVA; FPGA circuit; control circuits; floating-point digital signal processor ADSP-21065L; harmonic compensation; parallel active power filter; sliding DFT algorithm; sliding discrete Fourier transform algorithm; spectrum analysis; Active filters; Algorithm design and analysis; Circuit synthesis; Circuit testing; Digital signal processors; Discrete Fourier transforms; Field programmable gate arrays; Power harmonic filters; Signal processing algorithms; Signal synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual

ISSN

0275-9306

Print_ISBN

0-7803-8399-0

Type

conf

DOI

10.1109/PESC.2004.1354821

Filename

1354821