Title :
Efficient UBIST for RAMs
Author_Institution :
Reliable Integrated Syst. Group, TIMA/INPG, Grenoble, France
Abstract :
First presents a self-checking implementation for RAMs. Then, the unified BIST technique is applied to this scheme. It merges self-checking and BIST techniques and allows a high fault coverage for all tests needed for integrated circuits, e.g. off-line test (manufacturing and maintenance test) and periodic as well as concurrent on-line testing. In order to preserve the RAM contents for periodic on-line testing the authors employ a transparent BIST implementation
Keywords :
built-in self test; integrated circuit testing; integrated memory circuits; random-access storage; RAMs; UBIST; concurrent on-line testing; fault coverage; integrated circuits; off-line test; periodic on-line testing; self-checking implementation; transparent BIST implementation; unified BIST technique; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Decoding; Electrical fault detection; Fabrication; Integrated circuit manufacture; Integrated circuit testing; Production;
Conference_Titel :
VLSI Test Symposium, 1994. Proceedings., 12th IEEE
Conference_Location :
Cherry Hill, NJ
Print_ISBN :
0-8186-5440-6
DOI :
10.1109/VTEST.1994.292319
