Title :
Diagnostic simulation of stuck-at faults in combinational circuits
Author :
Chakravarty, Sreejit ; Gong, Yiming
Author_Institution :
Dept. of Comput. Sci., State Univ. of New York, Buffalo, NY, USA
Abstract :
Two faults are said to be equivalent, w.r.t. a test set T, iff they cannot be distinguished by any test in T. The sizes of the equivalence classes are used as a basis for comparing the diagnostic capability of two given test sets. The authors show that modifications of single stuck-at fault simulators leads to very efficient diagnostic simulators when compared with those reported in the literature
Keywords :
combinatorial circuits; equivalence classes; fault location; logic testing; combinational circuits; diagnostic capability; diagnostic simulators; equivalence classes; stuck-at faults; test set; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Computational modeling; Computer science; Fault diagnosis; Sequential analysis; Sequential circuits;
Conference_Titel :
VLSI Test Symposium, 1994. Proceedings., 12th IEEE
Conference_Location :
Cherry Hill, NJ
Print_ISBN :
0-8186-5440-6
DOI :
10.1109/VTEST.1994.292323
