NBTI and Concurrent HCI-NBTI Degradation of 65 nm SOI PMOSFETs

Body contacted (BC) core logic/high speed (HS) and input/output (I/O) SOI PMOSFETs from 65 nm technology are shown to have higher degradation than the counterpart floating body (FB) devices under NBTI stress. It is also observed that concurrent HCI-NBTI (hot-carrier injection-negative bias temperature instability) leads to worst case degradation for the I/O and HS SOI p-channel MOSFETs. I/O PMOS devices stressed under HCI conditions at room temperature show NBTI-like behavior at higher stress voltages and combined HCI-NBTI behavior at lower stress voltages. HS PMOS devices stressed under HCI conditions show a combined HCI and NBTI degradation behavior across the entire stress bias range. Both HS and I/O devices degrade more when HCI stressed with FB at high stress voltages; however the degradation becomes comparable to BC devices at lower stress voltages.