Title :
Thermal Effects of Three Dimensional Integrated Circuit Stacks
Author :
Chen, C.L. ; Chen, C.K. ; Burns, John A. ; Yost, D.-R. ; Warner, K. ; Knecht, J.M. ; Wyatt, P.W. ; Shibles, D.A. ; Keast, C.L.
Author_Institution :
Massachusetts Inst. of Technol., Lexington
Abstract :
Thermal effects on different tiers of wafer-scale three dimensional (3D) integrated circuits were examined. The temperature was measured using pn diodes, and the heating effects on the characteristics of MOSFETs were compared. It is found that the circuit at the top of the 3D stack is the hottest. Adding metal plugs through the buried oxide or placing metal heat sink at the top surface improves heat dissipation.
Keywords :
CMOS integrated circuits; heat sinks; integrated circuit measurement; silicon-on-insulator; wafer-scale integration; 3D integrated circuit stacks; CMOS processing; MOSFET; heat dissipation; heating effects; metal plugs; pn diodes; thermal effects; wafer scale; wafer-scale three dimensional integrated circuits; Electrical resistance measurement; Heat sinks; Heating; Integrated circuit measurements; Power measurement; Resistors; Semiconductor diodes; Temperature dependence; Temperature measurement; Voltage;
Conference_Titel :
SOI Conference, 2007 IEEE International
Conference_Location :
Indian Wells, CA
Print_ISBN :
978-1-4244-0879-5
Electronic_ISBN :
1078-621X
DOI :
10.1109/SOI.2007.4357867
