Implementation of a FPGA based Shared Memory System for high bandwidth communication between microprocessor and microcontroller

In present complex Embedded World, a large number of devices are based on embedded ×86 systems. The presence of ×86 architecture not only increases the complexity of the system but also makes the system a bit vulnerable. To overcome this weakness of embedded systems an intermediate hardware based solution is considered to be the best approach. The initiation of this work has been adapted from the research work done by Sven Plaga and was published in [2]. This paper presents the implementation of such an intermediate hardware module whose target is to provide a flexible development environment for the embedded developers. Moreover, helpful environments for embedded module customers in order to track down the error with the help of remote debug. The proposed hardware is layered between the ×86 computer-on-module and the backplane, to have full access to all the interfaces of the ×86 module. It consists of a Cyclone III Field Programmable Gate Array (FPGA) and an Arm 7 microcontroller performing higher end tasks such as power profiling and remote assistance - therefore it is named “Embedded Controller Interface” (ECI). The ECI is also capable of hosting a small web server; therefore, all the captured data can be accessed over Internet. The presented work also introduces a new concept to the Embedded World - the concept of a hardware based Shared Memory System between ×86 microprocessor and microcontroller.