FPGA implementation of an associative content addressable memory

Author

Ionescu, Laurentiu Mihai ; Mazare, Alin Gheorghita ; Serban, Gheorghe ; Barbu, Vlad ; Constantin, Anton

Author_Institution

Univ. of Pitesti, Pitesti, Romania

fYear

2011

fDate

7-8 Sept. 2011

Firstpage

1

Lastpage

4

Abstract

The content addressable memory (CAM) is allowed to search a data without knowing its address as to common memories. In addition, it allowed associating the content of the location or neighboring locations where the data word was identified. A problem that occurs to this type of memory is implementation complexity. A possible solution is to use a hardware implemented Hopfield neural network. This paper presents our own approach for FPGA hardware implementation of the CAM memory. Will be presented design methods and implementation to FPGA circuit structures, the performance of our solution and experimental results.

Keywords

Hopfield neural nets; content-addressable storage; field programmable gate arrays; integrated circuit design; integrated circuit modelling; CAM memory; FPGA circuit structure design method; FPGA hardware implementation; associative content addressable memory; data word-location association; hardware implemented Hopfield neural network; neighboring location content; Associative memory; Computer aided manufacturing; Field programmable gate arrays; Hardware; Integrated circuit modeling; Mathematical model; Neurons;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Electronics (AE), 2011 International Conference on

Conference_Location

Pilsen

ISSN

1803-7232

Print_ISBN

978-1-4577-0315-7

Electronic_ISBN

1803-7232

Type

conf

Filename

6049113