Title :
On-chip aging compensation for output driver
Author_Institution :
Technol. R&D, STMicroelectron. Pvt. Ltd., Greater Noida, India
Abstract :
In this paper an on-chip aging compensation technique for CMOS output driver is proposed. It contains an aging compensation cell which will detect the degradation in the ON current (ION) of output driver due to the HCI and BTI effect. Based on the degradation in the ION the aging compensation cell will generate aging compensation codes AP[0:3] for PMOS driver and AN[0:3] for NMOS driver. These aging compensation codes will increase the drive strength of output driver to compensate the degradation in ION of output driver due to HCI and BTI effect. The proposed design is implemented in 40nm CMOS process by using 1.8V thick-oxide (32Å) devices. The measurement result shows that by using the proposed aging compensation technique the impact of aging on output driver get reduced by 70% after 10 years of operation.
Keywords :
CMOS integrated circuits; ageing; driver circuits; BTI effect; CMOS output driver; HCI effect; NMOS driver; PMOS driver; aging compensation codes; on-chip aging compensation technique; size 40 nm; thick-oxide devices; voltage 1.8 V; Aging; Computer architecture; Degradation; Human computer interaction; MOS devices; Reliability; Stress; Aging Compensation; Aging Sensor; CMOS; HCI; MOSFET; NBTI; Output Driver; PBTI; Reliability;
Conference_Titel :
Reliability Physics Symposium, 2014 IEEE International
Conference_Location :
Waikoloa, HI
DOI :
10.1109/IRPS.2014.6861120