DocumentCode
187606
Title
A reliability lab-on-chip using programmable arrays
Author
Pfeifer, P. ; Kaczer, Ben ; Pliva, Z.
Author_Institution
Inst. of Inf. Technol. & Electron., Tech. Univ. of Liberec, Liberec, Czech Republic
fYear
2014
fDate
1-5 June 2014
Abstract
This paper presents a new concept of a reliability lab-on-chip - an ultimate platform for complete in-situ measurement, processing and evaluation of a chip reliability parameters, including aging purposes. It is shown how multiple test structures, including the measurement blocks, can be ad-hoc created and evaluated directly on a Field-Programmable Gate Array (FPGA) chip. Results from measurements including 45 nm and 28 nm processes are presented as well.
Keywords
field programmable gate arrays; integrated circuit reliability; lab-on-a-chip; FPGA chip; ad-hoc created; aging purpose; chip reliability parameter; field-programmable gate array; insitu measurement; measurement block; multiple test structure; programmable array; reliability lab-on-chip; size 28 nm; size 45 nm; Delays; Field programmable gate arrays; Frequency measurement; Reliability; Ring oscillators; Semiconductor device measurement; System-on-chip; Field Programmable Gate Array (FPGA); aging; in-situ methods; reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2014 IEEE International
Conference_Location
Waikoloa, HI
Type
conf
DOI
10.1109/IRPS.2014.6861123
Filename
6861123
Link To Document