Title :
FPGA-based DDR3 DRAM interface using bulk-Si optical interconnects
Author :
Hyunil Byun ; In-sung Joe ; Sunjoong Kim ; Kwanghyun Lee ; Seokyong Hong ; Hochul Ji ; Junghyung Pyo ; Kwansik Cho ; Seong-gu Kim ; Sungdong Suh ; Yong-hwack Shin ; Sanghoon Choi ; Junghye Kim ; Sangdeok Han ; Beomseok Lee ; Kyoungwon Na ; Dongjae Shin ;
Author_Institution :
Samsung Electron., Hwasung, South Korea
Abstract :
Optical interconnect for a DDR3 DRAM device is verified at a 4:1-serialized 1.6-Gbps data rate using a FPGA-based memory controller board and optical transceiver chips with bulk-Si-based photonic die and electronic die co-packaged.
Keywords :
DRAM chips; chip scale packaging; elemental semiconductors; field programmable gate arrays; integrated optoelectronics; optical interconnections; optical transceivers; silicon; FPGA-based DDR3 DRAM interface; FPGA-based memory controller board; Si; bit rate 1.6 Gbit/s; bulk-Si optical interconnects; bulk-Si-based photonic die; data rate; electronic die copackaging; optical transceiver chips; Optical amplifiers; Optical device fabrication; Optical fibers; Optical interconnections; Optical sensors; Random access memory; bulk silicon; memory interface; optical interconnect; silicon photonics;
Conference_Titel :
Group IV Photonics (GFP), 2013 IEEE 10th International Conference on
Conference_Location :
Seoul
Print_ISBN :
978-1-4673-5803-3
DOI :
10.1109/Group4.2013.6644462
