Soft error rate comparison of various hardened and non-hardened flip-flops at 28-nm node

Author

Gaspard, N. ; Jagannathan, Sarangapani ; Diggins, Zachary J. ; Mahatme, N.N. ; Loveless, T.D. ; Bhuva, B.L. ; Massengill, Lloyd W. ; Holman, W.T. ; Narasimham, B. ; Oates, A. ; Marcoux, Pierre ; Tam, Nelson ; Vilchis, M. ; Wen, S.-J. ; Wong, Rita ; Xu, Y.

Author_Institution

Vanderbilt Univ., Nashville, TN, USA

fYear

2014

fDate

1-5 June 2014

Abstract

For flip-flop designs fabricated at advanced technology nodes, soft errors are expected to contribute significantly to the overall failure-in-time rates for electronic systems. Since the soft error rates are design and layout dependent, it is important to evaluate different flip-flop designs used in an electronic system. Alpha-particle, high-energy proton, neutron, and heavy-ion experimental results of 30 different flip-flop designed and manufactured in a 28-nm bulk CMOS process are presented in this paper. The results show the spectrum of soft error rates a system-level designer may see for hardened and non-hardened flip-flops at the 28-nm bulk CMOS technology node.

Keywords

CMOS logic circuits; flip-flops; logic design; neutron effects; proton effects; radiation hardening (electronics); CMOS technology node; advanced technology nodes; alpha-particle; bulk CMOS process; electronic systems; failure-in-time rates; hardened flip-flop design; heavy-ion; high-energy proton; layout dependent; neutron; nonhardened flip-flop design; size 28 nm; soft error rate; system-level designer; Error analysis; Flip-flops; Integrated circuits; Neutrons; Protons; Shift registers; Single event upsets; flip-flop; single-event upset; soft error;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium, 2014 IEEE International

Conference_Location

Waikoloa, HI

Type

conf

DOI

10.1109/IRPS.2014.6861177

Filename

6861177