DocumentCode
1878031
Title
Speech synthesis method with a harmonic plus noise model
Author
Ishikawa, Y. ; Maruyama, I. ; Hase, T.
fYear
2002
fDate
18-20 June 2002
Firstpage
238
Lastpage
239
Abstract
The requirements of text-to-speech synthesis are increasing, since the speech interface is an appropriate user-friendly interface for consumer applications. However, in general, the quality of synthetic speech is not satisfactory, and speech synthesis requires a large amount of computation and memory. In this paper, we propose a high quality speech synthesis method for text-to-speech systems and report its implementation using a FPGA. The experimental results show the proposal method can generate high quality synthetic speech, and we can realize a low-power FPGA-based hardware for consumer applications.
Keywords
field programmable gate arrays; speech synthesis; speech-based user interfaces; FPGA; consumer applications; harmonic plus noise model; speech interface; speech quality; synthetic speech; text-to-speech synthesis; user-friendly interface; Acoustic noise; Degradation; Field programmable gate arrays; Filters; Frequency; Hardware; Power system harmonics; Proposals; Signal synthesis; Speech synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2002. ICCE. 2002 Digest of Technical Papers. International Conference on
Conference_Location
Los Angeles, CA, USA
Print_ISBN
0-7803-7300-6
Type
conf
DOI
10.1109/ICCE.2002.1014010
Filename
1014010
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