• DocumentCode
    1879051
  • Title

    Comparison of DTC implementations for synchronous machines

  • Author

    Llor, Ana ; Allard, Bruno ; Lin-Shi, Xuefang ; Retif, Jean-Marie

  • Author_Institution
    CEGELY, CNRS, Villeurbanne, France
  • Volume
    5
  • fYear
    2004
  • fDate
    20-25 June 2004
  • Firstpage
    3581
  • Abstract
    Direct-torque-control (DTC) is nowadays a classical technique for variable speed control of induction machines. Many implementations have been presented in literature DTC algorithm requires velocity for some parts and flexibility for other parts. Digital-signal-processors (DSP) have been used for flexibility, but field-programmable-gate-arrays (FPGA) have been preferred for velocity. Using one device (DSP or FPGA) for DTC implementation has been reported as not optimal. Codesign appears as a promising methodology for partitioning the DTC algorithm between flexible and fast parts. Codesign requires user-specifications to help the partitioning with regard to the awaited control performances. Authors discuss two experimental implementations at extremities of the codesign space, i.e. full-software or full-hardware implementation. For each implementation, the DTC algorithm requires adaptations. Authors detail each development, and full-codes are available on a dedicated web-site. Validation results are presented for both implementations. Performances, advantages, and limitations of both implementations are compared. The necessary specifications for codesign development may then be identified.
  • Keywords
    angular velocity control; digital signal processing chips; electric machine analysis computing; field programmable gate arrays; hardware-software codesign; machine control; synchronous machines; torque control; DSP; DTC; FPGA; codesign development; digital-signal-processors; direct-torque-control; field-programmable-gate-arrays; hardware implementation; induction machines; software implementation; synchronous machines; variable speed control; Digital signal processing; Digital signal processing chips; Extremities; Field programmable gate arrays; Hardware; Induction machines; Partitioning algorithms; Signal processing algorithms; Synchronous machines; Velocity control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual
  • ISSN
    0275-9306
  • Print_ISBN
    0-7803-8399-0
  • Type

    conf

  • DOI
    10.1109/PESC.2004.1355109
  • Filename
    1355109