DocumentCode
1879250
Title
An innovative, programmable architecture for ultra-low power motion estimation in reduced memory MPEG-4 encoder
Author
Alfonso, D. ; Rovati, F. ; Pau, D. ; Celetto, L.
Author_Institution
Adv. Syst. Technol. Labs., SGS-Thomson Microelectron., Agrate Brianza, Italy
fYear
2002
fDate
18-20 June 2002
Firstpage
344
Lastpage
345
Abstract
This paper describes an ultra-low power, cache based, and programmable motion estimator with memory reduction for MPEG-4 video encoding. It exploits a low complexity motion estimation algorithm, achieving a quality comparable to the full search approach with only 1% of the computation and the power consumption.
Keywords
cache storage; code standards; motion estimation; power consumption; storage management; video coding; MPEG-4 video encoding; cache based estimator; low complexity motion estimation; memory reduction; power consumption; programmable architecture; programmable motion estimator; reduced memory encoder; ultra-low power estimator; Algorithm design and analysis; Bandwidth; Buffer storage; Encoding; Hardware; Laboratories; MPEG 4 Standard; Motion estimation; System buses; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Consumer Electronics, 2002. ICCE. 2002 Digest of Technical Papers. International Conference on
Conference_Location
Los Angeles, CA, USA
Print_ISBN
0-7803-7300-6
Type
conf
DOI
10.1109/ICCE.2002.1014058
Filename
1014058
Link To Document