• DocumentCode
    1879668
  • Title

    Ripple-reduction tuned filtering switching power converter topology

  • Author

    Alarcón, E. ; Villar, G. ; Ferrández, S. ; Guinjoan, F. ; Poveda, A.

  • Author_Institution
    Dept. of Electron. Eng., Tech. Univ. of Catalunya, Barcelona, Spain
  • Volume
    5
  • fYear
    2004
  • fDate
    20-25 June 2004
  • Firstpage
    3739
  • Abstract
    This paper presents a low-ripple topology for switching power converters that approximates the ideal ripple-free averaged dynamics by means of reactive passive tuned filters. The low-ripple characteristics can be taken advantage of to either improve the suitability of the switching power converter to supply ripple-sensitive loads, or to reduce the value of the converter main filtering capacitor. The work explores this second property in the context of pursuing further miniaturization and particularly on-chip circuit integration of a switching power converter. Experimental results for a low frequency prototype demonstrate the functionality of the proposed low-ripple topology, showing in particular a reduction of a factor of seven for the main capacitor in the converter.
  • Keywords
    passive filters; power capacitors; switching convertors; system-on-chip; filtering capacitor; frequency prototype; low-ripple topology; on-chip circuit integration; reactive passive tuned filters; ripple-reduction; ripple-sensitive loads; tuned filtering switching power converter; Capacitors; Filtering; Frequency conversion; Passive filters; Power filters; Power supplies; Prototypes; Switching circuits; Switching converters; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual
  • ISSN
    0275-9306
  • Print_ISBN
    0-7803-8399-0
  • Type

    conf

  • DOI
    10.1109/PESC.2004.1355136
  • Filename
    1355136