3D technologies for reconfigurable architectures

FPGA have always taken benefit of the most advanced technology nodes for offering better performance than CPU and better time-to-market than ASSP. However, with the slow-down of technologies and its exponentially increasing cost, FPGA race towards better integration is nowadays compromised. One alternative path to scaling is to go 3D. This promising solution can offer scaling at a lower cost while solving some FPGA issues such as yield or I/Os management. However, 3D solutions come with some drawbacks with heterogeneous performances of 3D/2D links and limited 3D interconnections. In this paper, we show some recent advances on the usage of 3D technologies for enhancing FPGA capacities.