Title :
A New Virtual-Address-Mapping Mechanism for Low-Energy I-Cache
Author :
Yang Quansheng ; Li Hailong
Author_Institution :
Dept of Comput. Sci. & Eng., Southeast Univ., Nanjing, China
Abstract :
WPSA (Way-predicting set-associative) cache is a well-known approach to reduce the set-associative I-cache´s energy consumption. However, an extra cycle is needed if a prediction miss occurs. This may actually degrade the performance. This paper proposes a new virtual-address-mapping mechanism to aim at only accessing one way in I-cache within one cycle by adding a virtual address matching table which is implemented parallel to the TLB´s address translating. This approach reduces the energy consumption while maintaining the performance. Simulation-based evaluation shows that in contrast with the conventional set-associative I-cache, the approach we proposed can reduce about 63%~66% energy consumption and improve nearly 10% performance versus way-predicting access. Even though there are still energy costs, the method still saves a lot of energy.
Keywords :
cache storage; energy consumption; power aware computing; storage allocation; virtual machines; energy consumption; low energy I-cache; virtual address mapping mechanism; way predicting set associative cache; Degradation; Energy consumption; Indexes; Microprocessors; Optimization; Program processors; Semantics;
Conference_Titel :
Computational Intelligence and Software Engineering (CiSE), 2010 International Conference on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-5391-7
Electronic_ISBN :
978-1-4244-5392-4
DOI :
10.1109/CISE.2010.5677176