• DocumentCode
    1881335
  • Title

    A new test device for detecting very low leakage current using DRAM cell array

  • Author

    Oasa, T. ; Inada, H. ; Fujito, M. ; Matsumoto, T.

  • Author_Institution
    Sumitomo Metal Ind. Ltd., Hyogo, Japan
  • fYear
    1993
  • fDate
    22-25 Mar 1993
  • Firstpage
    145
  • Lastpage
    148
  • Abstract
    A method for measuring very low leakage current is presented. The method, named the variable Vpc method, is capable of detecting leakage current lower than 10-14 A in the area of 8.7×9.4 μm2 using a dynamic RAM (DRAM) cell. This method is used to measure the leakage current caused by oxidation-induced stacking faults (OSFs) originating in a Si wafer. The leakage current of OSFs is evaluated quantitatively
  • Keywords
    DRAM chips; cellular arrays; integrated circuit testing; stacking faults; DRAM cell array; OSFs; Si wafer; leakage current; oxidation-induced stacking faults; Capacitance; Circuits; Current measurement; Fabrication; Leak detection; Leakage current; Random access memory; Stacking; Testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Test Structures, 1993. ICMTS 1993. Proceedings of the 1993 International Conference on
  • Conference_Location
    Sitges
  • Print_ISBN
    0-7803-0857-3
  • Type

    conf

  • DOI
    10.1109/ICMTS.1993.292879
  • Filename
    292879
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1881335