DocumentCode :
1882499
Title :
Fault Identification in Reconfigurable Carry Lookahead Adders Targeting Nanoelectronic Fabrics
Author :
Rao, Wenjing ; Orailoglu, Alex ; Karri, Ramesh
Author_Institution :
Dept. of CSE, California Univ., San Diego, CA
fYear :
2006
fDate :
21-24 May 2006
Firstpage :
63
Lastpage :
68
Abstract :
Online repair through reconfiguration is a particularly advantageous approach in the nanoelectronic environment since reconfigurability is naturally supported by the devices. However, precise identification of faulty locations is of critical importance for fine-grain repairs. A CLA is mainly composed of: (1) carry generation blocks; and (2) g,p signal generation blocks. In this paper we propose two schemes for fault identification in these two parts correspondingly. For carry generation blocks, an inherently redundant computation path is exploited to identify the faulty block with high precision. As a time redundancy approach, recomputation with rotated operands (RERO) has been utilized in online fault detection for CLA´s (Li and Swartzlander, 1992). For g,p generation blocks, we exploit the RERO scheme to achieve precise fault identification. A comprehensive analysis is provided for the aliasing in the proposed fault identification approach. It is shown that both the amount of repair hardware overhead and the fault coverage loss for the proposed scheme are very low. Overall, the proposed scheme can perform fast and precise identification of faults in the CLA components with low area overhead, thus facilitating the development of powerful and efficient fault tolerance schemes through online repair for nanoelectronic systems
Keywords :
adders; fault simulation; logic testing; nanoelectronics; carry generation blocks; fault coverage loss; fault identification; fault tolerance schemes; faulty locations; nanoelectronic environment; nanoelectronic fabrics; nanoelectronic systems; online fault detection; recomputation with rotated operands; reconfigurable carry lookahead adders; repair hardware overhead; signal generation blocks; Adders; Circuit faults; Fabrics; Fault detection; Fault diagnosis; Fault tolerance; Fault tolerant systems; Hardware; Nanoscale devices; Redundancy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2006. ETS '06. Eleventh IEEE European
Conference_Location :
Southampton
Print_ISBN :
0-7695-2566-0
Type :
conf
DOI :
10.1109/ETS.2006.23
Filename :
1628155
Link To Document :
بازگشت