Title :
Mixed Test Pattern Generation Using a Single Parallel LFSR
Author :
Souza, C.P. ; Assis, F.M. ; Freire, R.C.S.
Author_Institution :
Dept. of Electr. Eng., Campina Grande Fed. Univ.
Abstract :
In this paper, new method is described to design a mixed-mode test pattern generator based only on a simple and single linear feedback shift register (LFSR). Such an LFSR synthesized by the Berlekamp-Massey algorithm is obtained in order to generate pre-computed deterministic test patterns to detect the hard-to-detect faults of the circuit. Among them, residual test patterns are generated to detect the others. Using the proposed method, a circuit can be tested at-speed and complete fault coverage is achieved with a small number of test patterns and small area overhead. The experimental results show that the proposed method compares favorably to other previous methods
Keywords :
automatic test pattern generation; built-in self test; fault diagnosis; feedback; logic testing; shift registers; Berlekamp-Massey algorithm; built-in self-test; fault coverage; fault detection; linear feedback shift register; mixed-mode test pattern generation; pre-computed deterministic test patterns; residual test patterns; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Hardware; Linear feedback shift registers; Logic testing; Test pattern generators; Berlekamp-Massey algorithm; Built-in self-test; linear feedback shift register; mixed-mode test pattern generation;
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2006. IMTC 2006. Proceedings of the IEEE
Conference_Location :
Sorrento
Print_ISBN :
0-7803-9359-7
Electronic_ISBN :
1091-5281
DOI :
10.1109/IMTC.2006.328382