• DocumentCode
    1883434
  • Title

    A configurable SRAM with constant-negative-level write buffer for low-voltage operation with 0.149µm2 cell in 32nm high-k metal-gate CMOS

  • Author

    Fujimura, Yasushi ; Hirabayashi, O. ; Sasaki, T. ; Suzuki, A. ; Kawasumi, A. ; Takeyama, Y. ; Kushida, K. ; Fukano, G. ; Katayama, Asako ; Niki, Y. ; Yabe, Tatsuro

  • Author_Institution
    Toshiba Semicond., Kawasaki, Japan
  • fYear
    2010
  • fDate
    7-11 Feb. 2010
  • Firstpage
    348
  • Lastpage
    349
  • Abstract
    This paper presents a configurable SRAM with 0.149 ¿nf cell in 32 nm high-k metal-gate CMOS. Constant-negative-level write buffer adjusts bitline level automatically for configuration range of four to 512 cells/bitline, improving write margin at low voltage. Measurement results demonstrate that cell-failure-rate improves by two orders of magnitude at 0.5 V.
  • Keywords
    CMOS memory circuits; SRAM chips; buffer storage; high-k dielectric thin films; low-power electronics; cell-failure-rate; configurable SRAM; constant-negative-level write buffer; high-κ metal-gate CMOS; low-voltage operation; size 32 nm; Random access memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4244-6033-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2010.5433813
  • Filename
    5433813
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1883434