DocumentCode
1883615
Title
SRAM stability characterization using tunable ring oscillators in 45nm CMOS
Author
Tsai, Jui-che ; Seng Oon Toh ; Zheng Guo ; Liang-Teck Pang ; Tsu-Jae King Liu ; Nikolic, B.
Author_Institution
Univ. of California, Berkeley, CA, USA
fYear
2010
fDate
7-11 Feb. 2010
Firstpage
354
Lastpage
355
Abstract
A method to characterize distributions of read and write margins of an SRAM array using tunable ring oscillators (ROs) is presented. A 45nm CMOS testchip demonstrates a write RO with frequency that correlates well with static wordline write-trip voltage and a read RO that that correlates well with the static-current noise margin as well as with the cell read current.
Keywords
CMOS memory circuits; SRAM chips; CMOS; SRAM stability characterization; cell read current; size 45 nm; static wordline write-trip voltage; static-current noise; tunable ring oscillators; Circuit noise; Current measurement; Frequency conversion; Frequency measurement; Inverters; Random access memory; Ring oscillators; Stability; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
978-1-4244-6033-5
Type
conf
DOI
10.1109/ISSCC.2010.5433820
Filename
5433820
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