DocumentCode :
1883671
Title :
A 1.296-to-5.184Gb/s Transceiver with 2.4mW/(Gb/s) Burst-mode CDR using Dual-Edge Injection-Locked Oscillator
Author :
Maruko, K. ; Sugioka, Tatsurou ; Hayashi, H. ; Zhiwei Zhou ; Tsukuda, Y. ; Yagishita, Y. ; Konishi, Hiroo ; Ogata, Takaaki ; Owa, H. ; Niki, T. ; Konda, K. ; Sato, Mitsuhisa ; Shiroshita, H. ; Ogura, Tsuneo ; Aoki, Toyohiro ; Kihara, H. ; Tanaka, Shoji
Author_Institution :
Sony, Tokyo, Japan
fYear :
2010
fDate :
7-11 Feb. 2010
Firstpage :
364
Lastpage :
365
Abstract :
A 1.296-to-5.184 Gb/s transceiver with 2.4 mW/(Gb/s) burst-mode CDR using a dual-edge injection-locked oscillator is fabricated in 40 nm CMOS. The chip operates over a range of 1.296 to 5.184 Gb/s. The proposed CDR locks in less than 20b and features continuous-rate capability, with twice the power efficiency of previously reported continuous-rate burst-mode CDRs.
Keywords :
CMOS integrated circuits; clock and data recovery circuits; injection locked oscillators; transceivers; 1.296-to-5.184Gb/s Transceiver; 2.4mW/(Gb/s) burst-mode CDR; 40 nm CMOS; bit rate 1.296 Gbit/s to 5.184 Gbit/s; dual-edge injection-locked oscillator; power 2.4 mW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-4244-6033-5
Type :
conf
DOI :
10.1109/ISSCC.2010.5433821
Filename :
5433821
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1883671
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