DocumentCode
1884023
Title
A low-power enable/disable GaAs MESFET differential logic
Author
Ribas, R.P. ; Bernal, A. ; Guyot, A.
Author_Institution
TIMA Lab., Grenoble, France
fYear
1996
fDate
3-6 Nov. 1996
Firstpage
81
Lastpage
84
Abstract
In this work, a novel and straightforward enable/disable GaAs MESFET Differential Logic (EMDL) structure is presented. EMDL is compatible with DCFL and some reported MESFET differential logic families, like DPTL, DCVS and DC/sup 2/FL. No power dissipation during the standby state, fewer transistors per logic function and noise immunity are its more interesting features. The EMDL can be efficiently applied in both synchronous and asynchronous designs. EMDL iterative network micropipeline applications are detailed. An 8-bit ripple carry adder was successfully fabricated and tested verifying the EMDL functionality and performance characteristics.
Keywords
III-V semiconductors; MESFET integrated circuits; adders; asynchronous circuits; carry logic; field effect logic circuits; gallium arsenide; logic design; pipeline processing; 8 bit; DCFL compatibility; EMDL iterative network micropipeline applications; GaAs; asynchronous design; low-power enable/disable GaAs MESFET differential logic; noise immunity; performance characteristics; ripple carry adder; synchronous design; Adders; CMOS logic circuits; Circuit testing; Gallium arsenide; Inverters; Laboratories; Logic functions; MESFETs; Power dissipation; Rails;
fLanguage
English
Publisher
ieee
Conference_Titel
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1996. Technical Digest 1996., 18th Annual
Conference_Location
Orlando, FL, USA
ISSN
1064-7775
Print_ISBN
0-7803-3504-X
Type
conf
DOI
10.1109/GAAS.1996.567742
Filename
567742
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