Accurate Interleaved Sampling of Repetitive Ultrasonic Waveforms: Two Clock Timing Architecture and its FPGA Implementation

Random interleaved sampling has become a widespread operating mode for digital storage oscilloscopes. Different repetitions of (notionally) the same waveform are recorded at random time shifts, and are interleaved in memory. This procedure requires substantial time, especially if further averaging is required. In this paper, an approach that ensures accurate time shifts is presented for ultrasonic measurements. Operating two independent oscillators with related frequencies forms the accurate shifts. One of these is used to excite an ultrasonic transducer, and the other to clock the analogue to digital converter (ADC). This architecture was implemented using a commercial "off-the-shelf" field programmable gate array (FPGA). An experimental waveform is presented that was sampled at the equivalent sampling frequency of 2160 MHz using an ADC with a clock frequency of 80 MHz. Power dissipation related to different architectures is discussed