Measurement of egress and ingress delays of PTP clocks

Distributed systems evolved to state-of-the-art solutions in many areas, like test, measurement and automation control systems. The protocol defined by the IEEE 1588 standard was designed to achieve clock synchronization among the different components of a distributed system using an unreliable communication network. Since any asymmetry between master and slave impacts the synchronization accuracy, PTP software has to compensate such asymmetries as much as possible. Our paper studies the effects of the hardware propagation delays on the synchronization. We present a setup that allows the direct measurement of these time delays and show results for a PTP clock that is generating the timestamps in the PHY and for a second one that is creating them on a MAC level. We discuss the characteristics of the time delays, and demonstrate the feasibility of the setup by using the measured compensation values in a synchronization experiment.