DocumentCode :
1884589
Title :
High performance reconfigurable floating-point arithmetic modules
Author :
Ashour, I.S.
fYear :
2005
fDate :
March 15-17, 2005
Firstpage :
337
Lastpage :
346
Keywords :
Adders; Design engineering; Design optimization; Digital arithmetic; Digital signal processing; Fast Fourier transforms; Field programmable gate arrays; Floating-point arithmetic; IEEE members; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Science Conference, 2005. NRSC 2005. Proceedings of the Twenty-Second National
Print_ISBN :
977-503183-4
Type :
conf
DOI :
10.1109/NRSC.2005.194018
Filename :
1502150
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1884589
بازگشت