An improved FPGA based model for automatic traffic sign detection

This paper describes a vital algorithm designed on a single integrated circuit chip. Using this chip, the traffic signals are monitored automatically depending on the mass of vehicles crossing a particular lane. It not only saves valuable time but also reduces the human which is highly required in this busy world. The other vital function of the chip is that it serves as an automatic traffic sign detector. The images of the traffic signs are processed by the chip to categorize the signs under a known category. This involves the use of image processing techniques. This function of the chip reduces human error related issues by alerting the vehicle´s driver to react on time thus reducing the potential traffic accidents The chip is so designed that when compared to all its previous counterparts it takes very little amount of time. Thus the chip serves the purpose of automatic traffic sign detector, when embedded in a vehicle. This results in area and cost reduction in designing the chip which is always looked for by any designer.