FPGA Implementation of a Probabilistic Neural Network for Spike Sorting

Hardware implementation of Neural Networks (NNs) provides advantages such as parallelism and real-time capabilities, whereas Probabilistic Neural Networks (PNNs) achieve high accuracy in pattern discrimination. In this paper, a FPGA implementation of a PNN sorting algorithm is proposed to sort spikes. Both Matlab-based and FPGA-based sorting algorithms using a PNN were implemented and evaluated, and results show that FPGA´s implementation is about 44.37 times faster than Matlab´s realization with the same accuracy. This novel method indicates that the performance of current FPGAs is capable of portable device application.