Author :
Kikuchi, Yu. ; Takahashi, Masaharu ; Maeda, T. ; Hara, Hideki ; Arakida, H. ; Yamamoto, Hiroshi ; Hagiwara, Y. ; Fujita, Takashi ; Watanabe, Manabu ; Shimazawa, T. ; Ohara, Yuki ; Miyamori, Takashi ; Hamada, Mohamed ; Oowaki, Yukihito
Abstract :
A 40 nm 14-core mobile application processor with a 222 mW Full-HD H.264 video decoder and a video/audio multiprocessor is developed. It has 25 power domains. The power switch circuits realize less than 1 ¿s power-up switching while minimizing rush current. The x512b power-efficient stacked DRAM l/F achieves 10.6 GB/S bandwidth.
Keywords :
DRAM chips; audio coding; microprocessor chips; video coding; H.264 video decoder; full-HD decoding application processor; mobile application processor; power 222 mW; power switch circuits; rush current; size 40 nm; stacked DRAM; video-audio multiprocessor; Application software; Decoding; Energy consumption; Engines; Hardware; Logic; Packaging; Random access memory; Switches; Wiring;
