DocumentCode
1886464
Title
A 25-Gb/s, 2.8-mW/Gb/s low power CMOS optical receiver for 100-Gb/s Ethernet solution
Author
Takemoto, Takashi ; Yuuki, Fumio ; Yamashita, Hiroki ; Ban, Takuma ; Kono, Masashi ; Lee, Yong ; Saito, Testuya ; Tsuji, Shinji ; Nishimura, Shinji
Author_Institution
Central Res. Lab., Hitachi, Ltd., Kokubunji, Japan
fYear
2009
fDate
20-24 Sept. 2009
Firstpage
1
Lastpage
2
Abstract
We demonstrate a high speed (25-Gb/s) and low power (2.8-mW/Gb/s) operation of a CMOS receiver for 100-Gb/s Ethernet, consisting of a novel transimpedance amplifier based on 65-nm CMOS technology and a back-illuminated PIN-PD.
Keywords
CMOS integrated circuits; low-power electronics; optical fibre LAN; optical receivers; p-i-n photodiodes; preamplifiers; CMOS optical receiver; Ethernet solution; back-illuminated PIN-PD; bit rate 100 Gbit/s; bit rate 25 Gbit/s; high speed operation; low power operation; photodiodes; size 65 nm; transimpedance amplifier; CMOS technology; Energy consumption; Ethernet networks; Frequency; Gain; High power amplifiers; Operational amplifiers; Optical amplifiers; Optical receivers; Semiconductor optical amplifiers;
fLanguage
English
Publisher
ieee
Conference_Titel
Optical Communication, 2009. ECOC '09. 35th European Conference on
Conference_Location
Vienna
Print_ISBN
978-1-4244-5096-1
Type
conf
Filename
5287225
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