DocumentCode
1886627
Title
A 16b 100-to-160MS/s SiGe BiCMOS pipelined ADC with 100dBFS SFDR
Author
Payne, Roger ; Corsi, Marco ; Smith, D. ; Kaylor, Scott ; Hsieh, Daniel
Author_Institution
Texas Instrum., Dallas, TX, USA
fYear
2010
fDate
7-11 Feb. 2010
Firstpage
294
Lastpage
295
Abstract
A 16b 160MS/S pipelined ADC built in a complementary SiGe BiCMOS process is presented, with an SFDR of 105dB and an SNR of 77dB at -1dBFS below 160MHz. The fully buffered track-and-hold has circuitry needed to achieve this performance. The internal sub-DAC uses circuits to mitigate the limitations imposed by transistor self-heating, early voltage and impact ionization.
Keywords
BiCMOS integrated circuits; Ge-Si alloys; analogue-digital conversion; SFDR; SiGe; SiGe BiCMOS; buffered track-and-hold; impact ionization; pipelined ADC; BiCMOS integrated circuits; Frequency; Germanium silicon alloys; Impedance; Resistors; Sampling methods; Silicon germanium; Switches; Switching circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
978-1-4244-6033-5
Type
conf
DOI
10.1109/ISSCC.2010.5433928
Filename
5433928
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