A 32Gb MLC NAND-flash memory with Vth-endurance-enhancing schemes in 32nm CMOS

Author

Changhyuk Lee ; Sok-kyu Lee ; Sunghoon Ahn ; Jinhaeng Lee ; Wonsun Park ; Yongdeok Cho ; Chaekyu Jang ; Chulwoo Yang ; Sanghwa Chung ; In-Suk Yun ; Byoungin Joo ; Byoungkwan Jeong ; Jeeyul Kim ; Jaekwan Kwon ; Hyunjong Jin ; Yujong Noh ; Jooyun Ha ; Moons

Author_Institution

Hynix Semicond., Icheon, South Korea

fYear

2010

fDate

7-11 Feb. 2010

Firstpage

446

Lastpage

447

Abstract

A 32 nm 32 Gb MLC flash memory, with MSB even page re-program, dramatically improves floating-gate (FG) coupling-induced V_th-widening while FG coupling cancellation program verify read minimizes performance loss due to additional program operation allowing throughput of 13.0 MB/S. More than 30% improvement in retention-V_th-shift and additional 50 mV reduction of cell Vth distribution is achieved by moving-read and adaptive code selection. Die size of the device is 146 mm² in 3M 32 nm CMOS.

Keywords

CMOS memory circuits; NAND circuits; coupled circuits; flash memories; CMOS; MLC NAND-flash memory; MSB even page re-program; Vth-endurance-enhancing schemes; adaptive code selection; floating-gate coupling cancellation program; floating-gate coupling-induced Vth-widening; moving-read selection; size 32 nm; storage capacity 32 Gbit; voltage 50 mV; Adaptive coding; Buffer storage; Costs; Degradation; Monitoring; Performance loss; Random access memory; Reflective binary codes; Throughput; Time measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

978-1-4244-6033-5

Type

conf

DOI

10.1109/ISSCC.2010.5433932

Filename

5433932