DocumentCode :
1887045
Title :
Negative-resistance read and write schemes for STT-MRAM in 0.13µm CMOS
Author :
Halupka, D. ; Huda, S. ; Song, Wanjuan ; Sheikholeslami, Ali ; Tsunoda, Koji ; Yoshida, Chikako ; Aoki, Masaki
Author_Institution :
Univ. of Toronto, Toronto, ON, Canada
fYear :
2010
fDate :
7-11 Feb. 2010
Firstpage :
256
Lastpage :
257
Abstract :
We present a negative-resistance read scheme and write scheme for spin-torque-transfer (STT) MRAM. A negative resistance shunting an STT-MRAM cell performs a non-destructive read operation, and saves power during write compared with the conventional scheme. Measurements show an 8 ns non-destructive read-access time and an average write power savings of 10.5% for a 16 kb STTMRAM fabricated in 0.13 μm CMOS using a CoFeB/MgO/CoFeB MTJ.
Keywords :
CMOS memory circuits; MRAM devices; cobalt compounds; magnesium compounds; tunnelling magnetoresistance; CMOS technology; CoFeB-MgO-CoFeB; STT-MRAM; magnetoresistive random access memory; negative resistance shunting; negative-resistance read scheme; negative-resistance write scheme; spin-torque-transfer; write power savings; Buffer storage; Driver circuits; Hysteresis; Magnetic tunneling; Nonvolatile memory; Testing; Time measurement; Topology; Voltage; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-4244-6033-5
Type :
conf
DOI :
10.1109/ISSCC.2010.5433943
Filename :
5433943
Link To Document :
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