Title :
A 82.5-GSample/s (10.3125-GHz × 8 phase-shifted clocks) sampling IC for 10G-EPON burst-mode CDR
Author :
Suzuki, Naoki ; Nakura, Kenichi ; Kozaki, Seiji ; Tagami, Hitoyuki ; Nogami, Masamichi ; Nakagawa, Junichi
Author_Institution :
Inf. Technol. R&D Center, Mitsubishi Electr. Corp., Kamakura, Japan
Abstract :
New very high-speed 82.5-GS/s sampling IC and its incorporated burst-mode CDR compliant for 10G-EPON is presented. The 82.5-GS/s sampling CDR successfully achieved a high pulse-width distortion tolerance of +/- 0.53 UI under distorted burst packets received condition of BER = 10-3.
Keywords :
analogue-digital conversion; clock and data recovery circuits; clocks; error statistics; optical fibre networks; phase shifters; very high speed integrated circuits; BER; EPON; Ethernet PON; Ethernet passive optical network; burst packet distortion; burst-mode CDR; clock and data recovery; high-speed sampling IC; phase-shifted clocks; pulse-width distortion tolerance; Clocks; Field programmable gate arrays; Forward error correction; High speed integrated circuits; Jitter; Logic circuits; Phase locked loops; Sampling methods; Space vector pulse width modulation; Synchronization;
Conference_Titel :
Optical Communication, 2009. ECOC '09. 35th European Conference on
Conference_Location :
Vienna
Print_ISBN :
978-1-4244-5096-1
