• DocumentCode
    1888118
  • Title

    A 32nm fully integrated reconfigurable switched-capacitor DC-DC converter delivering 0.55W/mm2 at 81% efficiency

  • Author

    Le, Hanh-Phuc ; Seeman, Michal ; Sanders, S.R. ; Sathe, V. ; Naffziger, Samuel ; Alon, Elad

  • Author_Institution
    Univ. of California, Berkeley, CA, USA
  • fYear
    2010
  • fDate
    7-11 Feb. 2010
  • Firstpage
    210
  • Lastpage
    211
  • Abstract
    A fully integrated switched-capacitor DC-DC converter with 32-phase interleaving is implemented in 0.374 mm2 of a 32 nm SOI process. The converter can be reconfigured into three topologies to support 0.5 to 1.2 V output from a 2 V input supply, and achieves a maximum efficiency of 77% at an output power density of 0.55 W/mm2.
  • Keywords
    DC-DC power convertors; reconfigurable architectures; silicon-on-insulator; switched capacitor networks; SOI process; integrated reconfigurable switched-capacitor DC-DC converter; output power density; size 32 nm; voltage 2 V; Capacitors; Clocks; DC-DC power converters; Interleaved codes; Inverters; Rails; Switches; Switching converters; Timing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4244-6033-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2010.5433981
  • Filename
    5433981
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1888118