A fault tolerant pipelined adaptive filter

Author

Allam, Bhasker ; Meyer, Martin ; Leathrum, James

Author_Institution

Dept. of Electr. & Comput. Eng., Old Dominion Univ., Norfolk, VA, USA

Volume

2

fYear

1994

fDate

31 Oct-2 Nov 1994

Firstpage

1026

Abstract

A fault tolerant pipelined architecture for high sampling rate adaptive filters is presented. The architecture, which is based on the computational requirements of delayed LMS and adaptive lattice filters, offers robust performance in the presence of single hardware faults, and software faults resulting from numerical instability. The reliability of the proposed system is analyzed and compared to the existing implementations strategies, and methods for fault detection, fault location, and recovery via hardware reconfiguration are discussed. Finally, simulation results illustrating recovery from processor fault are presented

Keywords

adaptive filters; circuit reliability; fault tolerant computing; lattice filters; least mean squares methods; numerical stability; pipeline processing; signal sampling; adaptive lattice filters; delayed LMS filters; fault detection; fault location; fault recovery; fault tolerant pipelined adaptive filter; fault tolerant pipelined architecture; hardware reconfiguration; high sampling rate; numerical instability; processor fault recovery; simulation results; single hardware faults; software faults; system reliability; transversal filters; Adaptive filters; Computer architecture; Delay; Fault tolerance; Hardware; Lattices; Least squares approximation; Robustness; Sampling methods; Software performance;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Systems and Computers, 1994. 1994 Conference Record of the Twenty-Eighth Asilomar Conference on

Conference_Location

Pacific Grove, CA

ISSN

1058-6393

Print_ISBN

0-8186-6405-3

Type

conf

DOI

10.1109/ACSSC.1994.471615

Filename

471615