DocumentCode
1888702
Title
Study on Hardware Implementation of Artificial Immune System
Author
Liu, Yong ; Li, Wenhai
Author_Institution
Grad. Students´´ Brigade, Naval Aeronaut. & Astronaut. Univ., Yantai, China
fYear
2010
fDate
25-26 Dec. 2010
Firstpage
1
Lastpage
4
Abstract
Negative selection algorithm is one of the most widely used techniques in the field of artificial immune systems. This paper proposed an approach to implement negative selection algorithm based on FPGA, aiming at fault detection problems. The negative selection algorithm generally uses binary matching rules to discriminate self from non-self. Firstly, three most widely used binary matching rules were presented. Then we gave the details of our implementation of binary matching rules technique on FPGA. Experiment result shows that this approach for negative selection algorithm is very effective. This paper also put forward the hardware immune system architecture with an immunologically inspired approach to fault tolerance. It demonstrates a finite state machine can be used to detect every faulty state during a normal operating cycle in FPGA.
Keywords
artificial immune systems; fault tolerance; field programmable gate arrays; pattern matching; FPGA; artificial immune system; binary matching rule; fault detection problem; fault tolerance; finite state machine; hardware immune system architecture; hardware implementation; negative selection algorithm; normal operating cycle; Artificial immune systems; Computational modeling; Detectors; Field programmable gate arrays; Hamming distance; Hardware;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Engineering and Computer Science (ICIECS), 2010 2nd International Conference on
Conference_Location
Wuhan
ISSN
2156-7379
Print_ISBN
978-1-4244-7939-9
Electronic_ISBN
2156-7379
Type
conf
DOI
10.1109/ICIECS.2010.5677809
Filename
5677809
Link To Document