High speed and ultra-low power 16/spl times/16 MAC design using TG techniques for web-based multimedia system

Author

Lee, Seung-Min ; Chung, Jin-Hong ; Yoon, Hyung-Seok ; Lee, Mike Myung-Ok

Author_Institution

Dept. of Inf. & Commun. Eng., Dongshin Univ., Chonnam, South Korea

fYear

2000

fDate

9-9 June 2000

Firstpage

17

Lastpage

18

Abstract

In this paper a study has been presented on high speed (HS) and 79 mW low power (LP) 16/spl times/16 MAC performance of new XOR-based circuits using transmission gate logic (TG) implemented on 0.65 /spl mu/m CMOS DLP/DLM technology. It is shown that our proposed MAC results in better performance than other published MACs due to no DC leakage currents for low power and bypassing unnecessary switching activities with latches before and after the multiplier for high speed.

Keywords

CMOS digital integrated circuits; high-speed integrated circuits; low-power electronics; multimedia computing; multiplying circuits; reduced instruction set computing; 0.65 micron; 79 mW; CMOS DLP/DLM technology; MAC design; TG techniques; XOR-based circuits; latches; multiplier-accumulator macro; transmission gate logic; web-based multimedia system; Adders; Application software; Circuits; Digital signal processing; Hardware design languages; Image processing; MOSFETs; Multimedia systems; Real time systems; Reduced instruction set computing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific

Conference_Location

Yokohama, Japan

Print_ISBN

0-7803-5973-9

Type

conf

DOI

10.1109/ASPDAC.2000.835057

Filename

835057