• DocumentCode
    1889481
  • Title

    Voltage reduction of application-specific heterogeneous multiprocessor systems for power minimisation

  • Author

    Rae, Allan ; Parameswaran, Sri

  • Author_Institution
    Dept. of Comput. Sci. & Electr. Eng., Queensland Univ., St. Lucia, Qld., Australia
  • fYear
    2000
  • fDate
    9-9 June 2000
  • Firstpage
    147
  • Lastpage
    152
  • Abstract
    We present a design strategy to reduce power demands in application-specific heterogeneous multiprocessor systems with interdependent subtasks. This power reduction scheme can be used with a randomised search such as a genetic algorithm where multiple trial solutions are tested. The scheme is applied to each trial solution after allocation and scheduling have been performed. Power savings are achieved by equally expanding each processor´s execution time with a corresponding reduction in their respective operating voltage. Lowest cost solutions achieve average reductions of 24% while minimum power solutions average 58%.
  • Keywords
    CMOS digital integrated circuits; application specific integrated circuits; circuit CAD; genetic algorithms; integrated circuit design; microprocessor chips; minimisation; multiprocessing systems; power consumption; application-specific heterogeneous multiprocessor systems; genetic algorithm; lowest cost solution; minimum power solutions; multiple trial solutions; power minimisation; power reduction; power savings; scheduling; trial solution; voltage reduction; Batteries; Costs; Energy consumption; Job shop scheduling; Minimization; Multiprocessing systems; Processor scheduling; System-on-a-chip; Testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2000. Proceedings of the ASP-DAC 2000. Asia and South Pacific
  • Conference_Location
    Yokohama, Japan
  • Print_ISBN
    0-7803-5973-9
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2000.835086
  • Filename
    835086